The need to design and manufacture CMOS amplifiers to maintain acceptable level of performances at low voltages is immensely important. This research work emphasizes on investigating the CMRR, slew rate, and DC gain of the fully differential CMOS op-amp using ORCAD PSPICE software. In this research work, the fully differential CMOS op-amp circuit operates at 3.3V power supply using 0.35 m CMOS technology. We have achieved a CMRR of 126.149dB, a DC open loop gain of 126.141dB, and the rising and falling slew rates were +17.76V/ s and -29.3V/ s respectively. The design was found to dissipate very small power ( 0.03685mW).