The main task of this research is to study the current buffer technique for the two stage CMOS operational amplifier design. It involves three basic concepts, theoretical calculation, design, simulation, and verification using CADENCE Allegro SPB and OrCAD Capture software, which is based on analog and digital electronic devices and advanced integrated circuit design fundamentals. Our work on the two stage CMOS op amp circuit using the current buffer technique tried and achieved an increased DC open loop gain with a reduced power consumption. The two stage CMOS op amp design was operated at ± 3.5V power supply using 0.35µ m CMOS technology and was found to exhibit a CMRR of 131.806dB, SR of 50V/µs and -25V/µs, wide UGB of 50.362MHz, and a DC open loop gain of 131.806dB, which could be tailored for for medical device applications. Key Words: Two stage CMOS Op Amp, DC gain PD and CADENCE OrCAD PSPICE.