The main task of this research work is to investigate the e ect of channel length on the DC open loop gain and voltage swing of a current bu er CMOS operational ampli er circuit. It involves three basic concepts, theoretical calculation, design, simulation, and veri cation using CADENCE OrCAD PSPICE Design and Simulation software. Our investigation on the current bu er CMOS op-amp design with L = 0.30 m has achieved high DC open loop gain of 133.33dB, wide UGB of 6.8716MHz and large output voltage swing (leading to high gain of 97.218dB) compared to the current bu er CMOS op-amp design with L = 1.0 m ,5 m and 10 m.Thus, small channel length is mostly very important to obtain optimal performance parameters, such as DC open loop gain and output voltage swing.