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| dc.contributor.author | Yeabsra, Dagnaw | |
| dc.date.accessioned | 2019-09-23T04:44:41Z | |
| dc.date.available | 2019-09-23T04:44:41Z | |
| dc.date.issued | 2019-09-23 | |
| dc.identifier.uri | http://hdl.handle.net/123456789/9731 | |
| dc.description.abstract | The main task of this research is to design and simulate a two stage CMOS operational amplifier by using OrCAD PSPICE Design and Simulation software, based on analog and digital electronic devices and advanced integrated circuit design fundamentals. It involves three basic concepts, theoretical calculation, design, simulation verification using OrCAD PSPICE software. Designers are continuously working toward tradesoff solutions between gain, input/output swings, speed, power dissipation and gain bandwidth. The two stage CMOS op amp circuits tries to increase the DC open loop gain, phase margin, and reduce power dissipation. The two stage CMOS op amp was analyzed by considering the effects of aspect ratios on the characteristics of the design parameters such as, nodal analysis (node voltage, node current, PD), DC sweep (ICMR), transient analysis (voltage swing, SR), and AC sweep (DC open loop gain, UGB, CMRR) which operates at ± 2.5V power supply using 0.35µ m CMOS technology. The designed two stages CMOS op amp was found to exhibit a PD of 0.214mW, ICMR of 4V, UGB of 12.043MHz, a DC open loop gain of 130.334dB, SR of -6.0V/µs ; 5.12V/µs, and CMRR of 130.330dB. Key Words: Two stage CMOS Op Amp, PD, ICMR, CMRR and OrCAD PSPICE. | en_US |
| dc.language.iso | en_US | en_US |
| dc.subject | Physics | en_US |
| dc.title | COMPUTER ASSISTED DESIGN OF TWO STAGE CMOS OP-AMP | en_US |
| dc.type | Thesis | en_US |
