DESIGN OF HIGH GAIN AND LOW POWER CMOS OPERATIONAL AMPLIFIER WITH CURRENT BUFFER

Getnet, Mitiku

dc.contributor.author	Getnet, Mitiku
dc.date.accessioned	2019-09-23T04:37:39Z
dc.date.available	2019-09-23T04:37:39Z
dc.date.issued	2019-09-23
dc.identifier.uri	http://hdl.handle.net/123456789/9727
dc.description.abstract	Abstract Due to the problem of power dissipation, electronic circuits are not fully utilized. Nowadays, the concept of low power system is one of the most indispensable criteria in several op amp applications. This research work discusses the simplest compensation method; ampliﬁer characterizations for op amps has been adopted to design a high gain and low power CMOS op amp, which operates at 3.5V power supply using 0.3 micron CMOS technology. Compensation with buﬀer ampliﬁer can be used as negative feedback for the circuit. The designs and simulations were done using PSPICE software applications. It’s circuit was designed to meet a set of speciﬁcations. We have achieved an open loop gain of 133.330dB, UGBW of 6.779MHz and PM of 89 for a capacitive load of 10pF. The CMOS op amp also has CMRR = 82.177dB, SR(-) = -2.2V/µs and SR(+) = 8.39V/µs, P d = 180.1µW, ICMR = -2.849V to 3.1564V. Key words: Compensation, Low Power, CMOS Technology, Negative Feedback, Current Buﬀer, PSPICE. 0	en_US
dc.language.iso	en_US	en_US
dc.subject	Physics	en_US
dc.title	DESIGN OF HIGH GAIN AND LOW POWER CMOS OPERATIONAL AMPLIFIER WITH CURRENT BUFFER	en_US
dc.type	Thesis	en_US