Abstract Due to the problem of power dissipation, electronic circuits are not fully utilized. Nowadays, the concept of low power system is one of the most indispensable criteria in several op amp applications. This research work discusses the simplest compensation method; amplifier characterizations for op amps has been adopted to design a high gain and low power CMOS op amp, which operates at 3.5V power supply using 0.3 micron CMOS technology. Compensation with buffer amplifier can be used as negative feedback for the circuit. The designs and simulations were done using PSPICE software applications. It’s circuit was designed to meet a set of specifications. We have achieved an open loop gain of 133.330dB, UGBW of 6.779MHz and PM of 89 for a capacitive load of 10pF. The CMOS op amp also has CMRR = 82.177dB, SR(-) = -2.2V/µs and SR(+) = 8.39V/µs, P d = 180.1µW, ICMR = -2.849V to 3.1564V. Key words: Compensation, Low Power, CMOS Technology, Negative Feedback, Current Buffer, PSPICE. 0