Abstract:
More and more, electronic devices are increasingly finding their way into our daily
lives. The general trend in the electronic industry is to continue developing micro
processors that operate faster, consume less power and occupy less space. So, in
this thesis work we have designed and simulated a two stage comparator on OrCAD
PSICE Design and Simulation software lµm technology standard CMOS process to
achieve a high speed, low offset voltage, low power dissipation, high gain values, high
output voltage ~wing and high performance.
A two stage CMOS comparator with operating supply voltage at± 2.5V and very low
offset voltage is investigated. The results were compared with theoretical values (ob
tained through hand calculations). Its bias point, DC response and transient response
results were.calculated, The comparator provides an open loop gain of 78.4dB, unity
gain frequency of 89.152MHz, -3dB bandwidth of 90 kHz, slew rate of 21 V / µ s, Out-
-put voltage swing of Vaut (max) of -2.5V to 2.4990V, PSRR of 79dB. The circuit takes
a propagation time delay of only 0.1 lps and consumes only 0.6m Watt power during
its operation.The designed two stage CMOS comparator satisfied and improved all
the required specifications.
Key words: CMOS, two stage comparator,Low power design, Low offset design,
...
High speed and OrCAD PSICE Design and Simulation software .
